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DATA SHEET
Part No. Package Code No.
AN44067A
HSOP034-P-0300A
Publication date: October 2008
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AN44067A Contents
Overview ............................................................................................................................. 3 Features ............................................................................................................................. 3 Applications ......................................................................................................................... 3 Package ............................................................................................................................ 3 Type .................................................................................................................................. 3 Application Circuit Example (Block Diagram) Pin Descriptions ............................................................................ 4 .................................................................................................................. 5
Absolute Maximum Ratings ..................................................................................................... 6 Operating Supply Voltage Range ............................................................................................. 6 Electrical Characteristics ....................................................................................................... 7 Electrical Characteristics (Reference values for design) ............................................................... 9 Technical Data ..................................................................................................................... 10 1. Control mode ..................................................................................................................... 10 2. Each phase current value ..................................................................................................... 11 3. Each phase current (timing chart) 4. Timing chart at change of DIR ......................................................................................... 13 ................................................................................................ 17
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AN44067A
AN44067A
Driver IC for stepping motor
Overview
AN44067A is s two channel H-bridge driver IC. Bipolar stepping motor can be controlled by a single driver IC. 2 phase excitation, half- step, 1-2 phase excitation, W1-2 phase excitation and 2W1-2 phase excitation can be selected.
Features
Built-in decoder for micro steps (2 phase excitation, half-step, 1-2 phase excitation, W1-2 phase excitation and 2W1-2 phase excitation) Stepping motor can be driven by only external clock signal. PMW can be driven by built-in CR (3-value can be selected during PWM OFF period.) Selection during PWM OFF period enables the best PWM drive. Mix decay compatible (4-value for fast decay ratio can be selected.) Mix decay control can improve accuracy of motor current wave form. Built -in low voltage detection If supply voltage lowers less than the range of operating supply voltage, low voltage detection operates and all phases of motor drive output are turned OFF. Built-in thermal protection If chip junction temperature rises and reaches setup temperature, all phases of motor drive output are turned OFF. 1 power supply with built-in 5 V power supply (accuracy 5%) Motor can be driven by only 1 power supply because of built-in 5 V power supply. Built-in standby function Operation of standby function can lower current consumption of IC. Built-in Home position function Home position function can detect the position of a motor.
Applications
IC for stepping motor drives
Package
34 pin plastic small outline package with heat sink (SOP type)
Type
Bi-CDMOS IC
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AN44067A
Application Circuit Example (Block Diagram)
BC1 13 0.01 F BC2 14
CHARGE PUMP
15 VPUMP
VM
Protection of GND
BOUT1 BOUT2
0.01 F
ENABLE 19 Gate circuit 6 BOUT2 TEST 25 SQ R TJMON 3 100 k
only TEST = High-level input
TEST
7 RCSB
DACB
8 BOUT1 VREF 23
1/10
1 VM2
S5VOUT
UVLO PWMSW 33 PWMSW
BLANK
0.1 F 47 F 17 VM1 10 AOUT2
OSC
TSD UVLO
1/10
PHA 28 DIR 32 ST1 31 ST2 30 ST3 29 Micro step decoder
DACA
11 RCSA QS R
DECAY1 21 DECAY2 20 Gate circuit 0.1 F S5VOUT 24 STBY 22 AMP VM
VM AOUT1 AOUT2
12 AOUT1
BG
Protection of GND
27 GND 4 GND
STBY
Note) This application circuit is shown as an example but does not guarantee the design for mass production set.
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Pin Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Pin Name VM2 N.C. TJMON GND N.C. BOUT2 RCSB BOUT1 GND AOUT2 RCSA AOUT1 BC1 BC2 VPUMP N.C. VM1 N.C. ENABLE DECAY2 DECAY1 STBY VREF S5VOUT TEST GND GND PHA ST3 ST2 ST1 DIR PWMSW N.C. Type Power supply
Description Motor power supply 2
Output Ground
VBE monitor / Test output / Home position output ground
Output Input / Output Output Ground Output Input / Output Output Output Output Output
Phase B motor drive output 2 Phase B current detection Phase B motor drive output 1 Die pad ground Phase A motor drive output 2 Phase A current detection Phase A motor drive output 1 Charge pump capacitor connection 1 Charge pump capacitor connection 2 Charge pump circuit output
Power supply
Motor power supply 1
Input Input Input Input Input Output Input Ground Ground Input Input Input Input Input Input
Enable / disable CTL Mix decay setup 2 Mix decay setup 1 Standby Torque reference voltage input Internal reference voltage (output 5 V) Test mode Die pad ground Signal ground Clock input Step select 3 Step select 2 Step select 1 Rotation direction PWM OFF period selection input
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AN44067A
Absolute Maximum Ratings
A No. 1 5 6 7 2 3 4 Parameter Supply voltage (pin 1, pin 17) Output pin voltage (pin 6, pin 8, pin 10, pin 12) Motor drive current (pin 6, pin 8, pin 10, pin 12) Flywheel diode current (pin 6, pin 8, pin 10, pin 12) Power dissipation Operating ambient temperature Storage temperature Symbol VM VOUT IOUT If PD Topr Tstg Rating 37 37 2.5 2.5 0.466 -20 to +70 -55 to +150 Unit V V A A W C C Note *1 *2 *3, *4 *3, *4 *5 *6 *6
Note) *1: The range under absolute maximum ratings, power dissipation. *2: This is output voltage rating and do not apply input voltage from outside to these pins. Set not to exceed allowable range at any time. *3: Do not apply external currents to any pin specially mentioned. For circuit currents, (+) denotes current flowing into the IC and (-) denotes current flowing out of the IC. *4: Rating when cooling fin on the back side of the IC is connected to the GND pattern of the glass epoxy 4-layer board. (GND area: 2nd-layer or 3rd-layer: more than 1 500 mm2 ) In case of no cooling fin on the back side of the IC, rating current is 1.5 A on the glass epoxy 2-layer board. *5: Power dissipation shows the value of only package at Ta = 70C. When using this IC, refer to the 7. PD - Ta diagram in the Technical Data and use under the condition not exceeding the allowable value. *6: Expect for the storage temperature and operating ambient temperature, all ratings are for Ta = 25C.
Operating Supply Voltage Range
Parameter Supply voltage range Symbol VM Range 10.0 to 34.0 Unit V Note
Note) The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
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Electrical Characteristics at VM = 24 V
Note) Ta = 25C2C unless otherwise specified.
B No. Output drivers 1 2 3 4 5 6
Parameter
Symbol
Conditions
Limits Min Typ Max
Unit
No te
High-level output saturation voltage Low-level output saturation voltage Flywheel diode forward voltage Output leakage current Supply current (active) Supply current (STBY)
VOH VOL VDI ILEAK IM IMSTBY VSTBYH VSTBYL ISTBYH ISTBYL VPHAH VPHAL IPHAH IPHAL fPHA VENABLEH VENABLEL IENABLEH IENABLEL VPWMSWH VPWMSWM VPWMSWL IPWMSWH IPWMSWL VPWMSWO
I = -1.2 A I = 1.2 A I = 1.2 A VM = 37 V, VRCS = 0 V ENABLE = High, STBY = High STBY = Low
VM VM - 0.75 - 0.42 0.5 2.1 0 25 -2 2.1 0 25 -2 2.1 0 25 -2 2.3 1.3 0 40 -70 1.3 0.54 1.0 10 5.5 25
0.825 1.5 20 10 50
V V V A mA A V V A A V V A A kHz V V A A V V V A A V

I/O block 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 High-level STBY input voltage Low-level STBY input voltage High-level STBY input current Low-level STBY input current High-level PHA input voltage Low-level PHA input voltage High-level PHA input current Low-level PHA input current Highest-level PHA input frequency High-level ENABLE input voltage Low-level ENABLE input voltage High-level ENABLE input current Low-level ENABLE input current High-level PWMSW input voltage Middle-level PWMSW input voltage Low-level PWMSW input voltage High-level PWMSW input current Low-level PWMSW input current PWMSW voltage at open 50 50 50 83 -36 1.5 5.5 0.6 100 2 5.5 0.6 100 2 100 5.5 0.6 100 2 5.5 1.7 0.6 150 -18 1.7
STBY = 5 V STBY = 0 V
PHA = 5 V PHA = 0 V
ENABLE = 5 V ENABLE = 0 V PWMSW = 5 V PWMSW = 0 V
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Note) Ta = 25C2C unless otherwise specified.
Electrical Characteristics at VM = 24 V (continued)
Limits Min Typ Max No te
B No.
Parameter
Symbol
Conditions
Unit
I/O block (continued) 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 High-level DECAY input voltage Low-level DECAY input voltage High-level DECAY input current Low-level DECAY input current High-level DIR input voltage Low-level DIR input voltage High-level DIR input current Low-level DIR input current High-level ST input voltage Low-level ST input voltage High-level ST input current Low-level ST input current High-level TEST input voltage Middle-level TEST input voltage Low-level Test input voltage High-level TEST input current Low-level TEST input current VDECAYH VDECAYL IDECAYH IDECAYL VDIRH VDIRL IDIRH IDIRL VSTH VSTL ISTH ISTL VTESTH VTESTM VTESTL ITESTH ITESTL TEST = 5 V TEST = 0 V DIR = 5 V DIR = 0 V ST1 = ST2 = ST3 = 5 V ST1 = ST2 = ST3 = 0 V DECAY1 = DECAY2 = 5 V DECAY1 = DECAY2 = 0 V 2.1 0 25 -2 2.1 0 25 -2 2.1 0 25 -2 4.0 2.3 0 25 -2 -15 -2 16.8 9.1 4.9 0.4 475 50 50 50 50 28 15.2 8.1 0.7 500 5.5 0.6 100 2 5.5 0.6 100 2 5.5 0.6 100 2 5.5 2.7 0.6 100 2 V V A A V V A A V V A A V V V A A A A s s s s mV
Torque control block 43 44 45 46 47 48 49 Input bias current 1 Input bias current 2 PWM OFF time 1 PWM OFF time 2 PWM OFF time 3 Pulse blanking time Comp threshold IREFH IREFL TOFF1 TOFF2 TOFF3 TB VTCMP VS5VOUT ZS5VOUT VREF = 5 V VREF = 0 V PWMSW = L PWMSW = M PWMSW = H VREF = 0 V VREF = 5 V IS5VOUT = 0 mA IS5VOUT = -7 mA Pull up TJMON pin to 5 V with 100 k. VTJMON = 5 V 5 2 39.2 21.3 11.3 1.0 525
Reference voltage block 50 51 Reference voltage Output impedance 4.75 5.0 5.25 10 V
Home position block 52 53 At TEST high-level input TJMON output Low-level voltage At TEST high-level input TJMON output leakage current VTJL ITJ(leak) 0.1 0.3 5 V A
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AN44067A
Electrical Characteristics (Reference values for design) at VM = 24 V
Note) Ta = 25C2C unless otherwise specified. The characteristics listed below are reference values for design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, Panasonic will respond in good faith to user concerns.
B No. Output drivers 54 55 56
Parameter
Symbol
Conditions
Limits Min Typ Max
Unit
No te
Output slew rate 1 Output slew rate 2 Dead time
VTr VTf TD
Output voltage rise Output voltage fall

220 200 0.8

V/s V/s s

Thermal protection 57 58 Thermal protection operating temperature Thermal protection hysteresis width TSDon TSD VUVLO1 VUVLO2 150 40
C C

Low voltage protection 59 60 Protection operating voltage Protection releasing voltage 7.9 8.7 V V
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Technical Data
1. Control mode 1) Truth table (step select) ENABLE High Low Low Low Low Low ENABLE High Low Low Low Low Low DIR Low Low Low Low Low DIR High High High High High ST1 Low Low High High ST1 Low Low High High ST2 Low High Low High ST2 Low High Low High ST3 Low Low Low Low High ST3 Low Low Low Low High Output excitation mode (phase B 90 delay: to phase A) Output OFF 2 phase excitation drive (4-step sequence) Half-step drive (8-step sequence) 1-2 phase excitation drive (8-step sequence) W1-2 phase excitation drive (16-step sequence) 2W1-2 phase excitation drive (32-step sequence) Output excitation mode (phase B 90 advance: to phase A) Output OFF 2 phase excitation drive (4-step sequence) Half-step drive (8-step sequence) 1-2 phase excitation drive (8-step sequence) W1-2 phase drive (16-step sequence) 2W1-2 phase drive (32-step sequence)
2) Truth table (control/charge pump circuit) STBY Low High High ENABLE -- High Low
Control /Charge pump circuit
Output transistor OFF OFF ON
OFF ON ON
3) Truth table (PWM OFF period selection) PWMSW Low Middle High PWM OFF period 28.0 s 15.2 s 8.1 s 5) Truth table (test mode) Decay control Slow decay 25% 50% 100% High TEST Low Middle TJMON VBE monitor Test output (Output transistor: OFF) Home position output
4) Truth table (decay selection) DECAY1 Low Low High High DECAY2 Low High Low High
Note) For each PWM OFF period, Fast decay is applied according to the above table.
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Technical Data (continued)
2. Each phase current value 1) 1-2 phase, W1-2 phase, 2W1-2 phase DIR = Low
Note) The definition of Phase A and B current 100%: (VREF x 0.1) / current detection resistance
1-2 phase (8 step)
W1-2 phase (16 step)
2W1-2 phase (32 step) 1
Phase A current (%) 19.5 38.3 55.6 70.7 83.2 92.4 98.1 100 98.1 92.4 83.2 70.7 55.6 38.3 19.5 0 -19.5 -38.3 -55.6 -70.7 -83.2 -92.4 -98.1 -100 -98.1 -92.4 -83.2 -70.7 -55.6 -38.3 -19.5 0
Phase B current (%) -98.1 -92.4 -83.2 -70.7 -55.6 -38.3 -19.5 0 19.5 38.3 55.6 70.7 83.2 92.4 98.1 100 98.1 92.4 83.2 70.7 55.6 38.3 19.5 0 -19.5 -38.3 -55.6 -70.7 -83.2 -92.4 -98.1 -100 11
1
2 3
1
2
4 5
3
6 7
2
4
8 9
5
10 11
3
6
12 13
7
14 15
4
8
16 17
9
18 19
5
10
20 21
11
22 23
6
12
24 25
13
26 27
7
14
28 29
15
30 31
8
16
32
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AN44067A
Technical Data (continued)
2. Each phase current value (continued) 2) 1-2 phase, W1-2 phase, 2W1-2 phase DIR = High
Note) The definition of Phase A and B current 100%: (VREF x 0.1) / current detection resistance
1-2 phase (8 step)
W1-2 phase (16 step)
2W1-2 phase (32 step) 1
Phase A current (%) -19.5 -38.3 -55.6 -70.7 -83.2 -92.4 -98.1 -100 -98.1 -92.4 -83.2 -70.7 -55.6 -38.3 -19.5 0 19.5 38.3 55.6 70.7 83.2 92.4 98.1 100 98.1 92.4 83.2 70.7 55.6 38.3 19.5 0
Phase B current (%) -98.1 -92.4 -83.2 -70.7 -55.6 -38.3 -19.5 0 19.5 38.3 55.6 70.7 83.2 92.4 98.1 100 98.1 92.4 83.2 70.7 55.6 38.3 19.5 0 -19.5 -38.3 -55.6 -70.7 -83.2 -92.4 -98.1 -100 12
1
2 3
1
2
4 5
3
6 7
2
4
8 9
5
10 11
3
6
12 13
7
14 15
4
8
16 17
9
18 19
5
10
20 21
11
22 23
6
12
24 25
13
26 27
7
14
28 29
15
30 31
8
16
32
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AN44067A
Technical Data (continued)
3. Each phase current (timing chart) 1) 2 phase excitation drive (4-step sequence) (ST1 = Low, ST2 = Low, ST3 = Low)
1 2 3 4 1 2 3 4 1 1 2 3 4 1 2 3 4 1
CLK
CLK
+100%
+100%
IAOUT1
0% -100% +100%
IAOUT1
0% -100% +100%
IBOUT1
0% -100%
IBOUT1
0% -100%
FWD (DIR = Low)
REV (DIR = High)
2) Half-step drive (8-step sequence) (ST1 = Low, ST2 = High, ST3 = Low)
1 2 3 4 5 6 7 8 1 1 2 3 4 5 6 7 8 1
CLK
CLK
+100% 0% -100% +100%
+100% 0% -100% +100%
IAOUT1
IAOUT1
IBOUT1
0% -100%
IBOUT1
0% -100%
FWD (DIR = Low)
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AN44067A
Technical Data (continued)
3. Each phase current (timing chart) (continued) 3) 1-2 phase excitation (8-step sequence) (ST1 = High, ST2 = Low, ST3 = Low)
1 2 3 4 5 6 7 8 1 1 2 3 4 5 6 7 8 1
CLK
CLK
+100%
+100%
IAOUT1
0% -100% +100%
IAOUT1
0%
-100% +100%
IBOUT1
0% -100%
IBOUT1
0%
-100%
FWD (DIR = Low)
REV (DIR = High)
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AN44067A
Technical Data (continued)
3. Each phase current (timing chart) (continued) 4) W1-2 phase excitation (16-step sequence) (ST1 = High, ST2 = High, ST3 = Low)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1
CLK
+100%
IAOUT1
0%
-100% +100%
IBOUT1
0%
-100%
FWD (DIR = Low)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
CLK
+100%
IAOUT1
0%
-100% +100%
IBOUT1
0%
-100%
REV (DIR = High)
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AN44067A
Technical Data (continued)
3. Each phase current (timing chart) (continued) 5) 2W1-2 phase excitation (32-step sequence) (ST3 = High)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1
CLK
+100%
IAOUT1
0%
-100% +100%
IBOUT1
0%
-100%
FWD (DIR = Low)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1
CLK
+100%
IAOUT1
0%
-100% +100%
IBOUT1
0%
-100%
REV (DIR = High)
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AN44067A
Technical Data (continued)
4. Timing chart at change of DIR (Ex.1) Timing chart at 1-2 phase excitation (DIR: Low High)
PHA DIR
A-ch. motor current
B-ch. motor current
State : 5
6
7
6
7
6
5
At change of DIR, the state before the change is held and the operation is continued.
(Ex.2) Timing chart at 1-2 phase excitation (DIR: High Low) PHA DIR
A-ch. motor current
B-ch. motor current
State
3
4
5
4
3
2
1
At change of DIR, the state before the change is held and the operation is continued.
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Request for your special attention and precautions in using the technical information and semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: - Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. - Any applications other than the standard applications intended. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20080805

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